XD Verge is a low SWaP, low-latency, hardware-enforced one-way transfer data diode built on Owl’s revolutionary FPGA-based XDE Radium protocol filtering diode (PFD) module.
The Future of Data Diode Technology is Here
XD Verge features a revolutionary FPGA-based architecture utilizing Owl’s XDE Radium embedded data diode module for high throughput, high assurance, and ultra-low latency in a low-SWaP-c solution. Much more than a simple data diode, XD Verge provides hardware-enforced network segmentation and one-way data transfer with protocol filtering and packet header deconstruction.
Packet Filtering and One-Way Data Transfer
- Guaranteed one-way transfer enforced by FPGA and hardware isolators
- Protocol break – no routable information is passed between source and destination networks and packet contents are rebuilt in the receive FPGA
- Packet-by-packet whitelist content filtering
- Packets with non-compliant content are dropped by the source-side FPGA before being passed across the hardware isolator
Key Hardware-Based Component for RTB Compliance
The latest Raise-the-Bar (RTB) guidelines will require nearly all cross domain connections to classified networks to include a hardware-enforced domain separation by 2023. XD Verge provides hardware-enforced network segmentation with an optical or digital isolator and up to 1 Gbps one-way data flow. And because it does not feature internal CPUs, it is also invulnerable to CPU-based attacks.
UDP, ARP (Source Side)
101.6 mm x 76.2 mm x 38.1 mm / 4″ x 3″ x 1.5″
1.36 kg / 3 lbs.
5V x 2 (via onboard headers)
Max Usage 6W
PORTS (PER SIDE)
1x 1Gbe RJ-45
-40º to 70º C / -40º to 158º F
Common Criteria EAL 4+
U.S. Government Data Diode Evaluation